new to Microwind

[martindoyle77@hotmail.com]

Hi there Im fairly new to learning cmos design and struggling a bit with some coursework... we have to realize a logic function using the package (a two input full adder) using full custom design, it gives the process gain factor and inversion layer mobility values for for enhancement n channel and p channel transistors, as well as threshold voltages, lambda values and the required aspect ratios

we have to design 'transistor level implementation' (not sure exactly what they mean by this) , then construct the stick diagram obtain an ic mask layout then perform a detailed simulation without design rule violition.

I feel comfortable with stick diagrams I think its just the process gain factor and mobility values and how they become relevant in the design. My guesse is that because we are not given the capacitance (cox) that maybe we have to find that out using the available data and design the gate parameters to yield the correct capictance and ultimately, drain current. again I apologize if this is insulting anyones intelligence Its probably trivial but It sems like a daunting task at the moment so any kind of advice would be very much appreciated as wel all had to start somewhere!!

Thanks again

Martin